NRF52840-QIAA-R
Bluetooth 5,IEEE802.15.4-2006.2.4 GHztransceiver
-95 dBm sensitivity in 1 Mbps B/uetooth low energy mode
-103 dBm sensitivity in 125 kbps B/uetooth low energy mode (long range
20 to +8 dBm TX power, configurable in 4 dB steps
On-air compatible with nRF52,nRF51, nRF24L, and nRF24AP Series
Supported data rates:
B/uetooth 5:2 Mbps,1 Mbps, 500 kbps, and 125 kbpsIEEE 802.15.4-2006: 250 kbpsProprietary 2.4 GHz: 2 Mbps, 1 Mbps
Single-ended antenna output(on-chip balun)
128-bit AES/ECB/CCM/AAR co-processor (on-the-fly packet encryption)
4.8 mA peak current in TX (0 dBm)
4.6 mA peak current in RX
RSSl (1 dB resolution)ARM Cortex -M4 32-bit processor with FPU, 64 MHZ
212 EEMBC CoreMark score running from flash memory
52 μA/MHz running coreMark from flash memony
Watchpoint and trace debug modules (DWT, ETM, and ITM)
Serial wire debug (SWD)
Rich set of security features
ARM TrustZone Cryptocell 310 security subsystemNIST SP800-90A and $P800-90B compliant random number generatorAES-128:ECB,CBC,CMAC/CBC-MAC,CTR.CCM/CCMChacha20/Poly1305 AEAD supporting 128- and 256-bit key sizeSHA-1, SHA-2 up to 256 bitsKeyed-hash message authentication code (HMAC)RSA up to 2048-bit key sizeSRP up to 3072-bit key sizeECC support for most used curves, among others P-256 (secp256r1) andEd25519/Curve25519
Application key management using derived key modelSecure boot ready
Flash access control list (ACL)
Root-of-trust (RoT)
Debug control and configuration
Access port protection (CTRL-AP)
Secure erase
Flexible power management
1.7 V to 5.5 wsupply voltage rangeOn-chip DC/DC and LDO regulators with automated lowcurrent modes
1.8 V to 3.3 Vregulated supply for external components
Automated peripheral power management
Fast wake-up using 64 MHz internal oscillator
0.4 wA at 3 V in System OFF mode, no RAM retention
1.5 wA at 3 V in System ON mode, no RAM retention, wake on
RTC
1 MB flash and 256 kB RAM
Advanced on-chio interfaces
USB 2.0 full speed (12 Mbps) controller
QSP| 32 MHz interface
High-speed 32 MHz SPI
Type 2 near field communication (NFC-A) tag with wake onfield
Touch-to-pair supportProgrammable peripheral interconnect (PPl)
48 general purpose l/O pins
EasyDMA automated data transfer between memory andperipheralsNordic SoftDevice ready with support for concurrent multiprotocol
12-bit, 200 ksps ADC-8 configurable channels with programmable
gain
64 level comparator
15 level low-power comparator with wake-up from System OFFmode
Temperature sensor
4x 4-channel pulse width modulator (PwM) unit with EasyDMA
Audio peripherals: l2S, digital microphone interface (PDM)5x 32-bit timer with counter mode
Up to 4x SPl master/3x SPl slave with EasyDMA
Up to 2x l2C compatible 2-wire master/slave
2x UART (CTS/RTS) with EasyDMA
Quadrature decoder (QDEC)
3x real-time counter (RTC)
Single crystal operation
Package variants
aQFN 73 package,7x7 mmWLCSP93 package, 3.544 x3.607 mm
Advanced computer peripherals and l/O devices
Mouse
Keyboard
Multi-touch trackpad
Advanced wearables
Health/fitness sensor and monitor devices
Wireless payment enabled devices
Internet of things (loT)
Smart home sensors and controllers
Industrial loT sensors and controllers
Interactive entertainment devices
Remote controls
Gaming controllers
About this document
This product specification is organized into chapters based on the modules and peripherals that areavailable in this lC.
The peripheral descriptions are divided into separate sections that include the following information:
A detailed functional description of the peripheral
Register configuration for the peripheral
Electrical specification tables, containing performance data which apply for the operating conditionsdescribed in Recommended operating conditions on page 611.
Block diagram
This block diagram illustrates the overall system. Arrows with white heads indicate signals that sharephysical pins with other signals.
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